1. Field
The present disclosure relates to control systems, more particularly to asynchronous control systems and systems for motor controlling.
2. Description of Related Art
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing, hence the name “field-programmable”. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). FPGA modules traditionally operate at a clock speed on the order of MHz.
An FPGA can be associated with an electric motor control systems to provide additional control and/or feedback systems for enhanced motor operation. However, the motor control systems can operate at a clock speed on the order of 10's to 100's of Hz. This causes asynchronous timing between the FPGA commands and the motor control systems which traditionally require computationally intensive or energy taxing solutions.
Such conventional methods and systems have generally been considered satisfactory for their intended purpose. However, there is still a need in the art for improved event synchronization systems and methods. The present disclosure provides a solution for this need.